CE2704 · Digital Logic Design
Theme 4 · Combinational building blocks

Meet the ALU

Every block in this theme was practice for one machine: the arithmetic logic unit, the calculating heart of every processor — and it's still just combinational logic.

Built from first principles. (A concept tour now; you'll build one in Theme 11.)

Before you start

What you need first

  • Adder/subtractor — the arithmetic path.
  • Multiplexer — to select which result comes out.
  • Logic gates — AND/OR/XOR as bitwise operations.

What you'll be able to do

  • Say what an ALU is and read its block symbol.
  • See how it's built: parallel units + a MUX picked by the opcode.
  • Name the common status flags and why the ALU is combinational.

What an ALU is

An ALU (arithmetic logic unit) takes two operands A and B, an opcode that says which operation to perform, and produces a result Y plus a few status flags. It can add, subtract, AND, OR, XOR, compare — the menu the processor's instructions are built from.

A B Op Flags Y ALU
The ALU symbol: A, B in the top; opcode on the left; result Y out the bottom; status flags out the side.
The opcode is just select lines in disguise. Choosing the operation is the same idea as a MUX choosing an input — which is exactly how the ALU is built.

A small ALU might offer 8 operations, chosen by a 3-bit opcode (23 = 8). Bigger ALUs simply have a wider opcode.

How it's built — from the blocks you already have

The trick: run all the operations at once, in parallel, then use a MUX to keep only the one the opcode asked for. The adder/subtractor, the AND, the OR, the XOR each compute their result; the opcode is the MUX's select line.

ADD / SUB AND OR XOR MUX AB Y Op flags
Inside the ALU: every unit computes in parallel; the MUX, steered by the opcode, passes just one result to Y. (Buses A and B are n bits wide.)
Nothing here is new — it's the adder/subtractor, a few gates, and a MUX, wired together. That's hierarchical design paying off: tested bricks become a processor's core.

The status flags

Alongside the result, an ALU reports a few one-bit flags describing it. These are what later instructions (like "branch if equal") test:

FlagSet when…
Z — Zerothe result is all 0s
C — Carrythe addition produced a carry-out (unsigned overflow)
N — Negativethe result's sign bit (MSB) is 1
V — Overflowa signed result fell outside the representable range
Why "combinational" matters: the ALU has no memory — its result and flags depend only on the operands and opcode present right now. Give it the same inputs and you always get the same answer. Memory and sequencing come from the circuits around it (registers, the clock) — which is exactly where Theme 5 goes next.

✏️ Try it yourself

(a) What three kinds of input does an ALU take? (b) Which block selects which operation's result becomes Y? (c) What does the opcode act as? (d) Which flag is set when the result is zero? (e) Why is the ALU called combinational?

(a) two operands (A, B) and an opcode. (b) a multiplexer (MUX). (c) the MUX's select lines. (d) the Zero (Z) flag. (e) its outputs depend only on the present inputs — it has no memory or stored state.

Recap — the whole topic on one screen

IdeaWhat you own now
ALUoperands A,B + opcode → result Y + flags
How builtparallel units (add/sub, AND, OR, XOR) → MUX picked by opcode
Opcode= the MUX select lines
FlagsZ (zero), C (carry), N (negative), V (overflow)
Combinationalno memory — output depends only on present inputs

Next theme · Theme 5

Logic that remembers: latches

Every block so far forgets instantly. But a processor must hold values — store a result, count, keep state. Theme 5 adds memory to logic, starting with the latch: the first circuit that can remember a single bit.

→ Latches